8 trends that will shape the future of the semiconductor industry

A brief summary of the most ­important trends that will ­determine the development of the semiconductor technology of today and tomorrow.


1 Moore’s Law still applies

The CMOS transistor density will continue to follow Moore’s Law over the next few years. This is primarily enabled by progress in EUV patterning and by the roll-out of innovative chip architectures. FinFET technology is reaching its limits with scaling over five nanometres. ­Nanosheet or gate-all-around transistors offer the solution: this is a modified transistor structure where the gate is in contact with the channel on all sides and enables continuous scaling. They promise power ­increases of more than 25 per cent and a reduction in electricity consumption by more than 50 per cent.


2 new chip architectures enter the market

The x86 architecture has dominated the ­microprocessor industry for over 50 years. However, this is now ­changing: the ARM architecture is increasingly ­impressing with its performance and low electricity consumption. ARM provides its IP to chip ­manufacturers; these manufacturers then develop their own chips based on this and can have them produced in foundries. ­Furthermore, the RISC-V architecture has gained importance in IoT devices and other applications due to the benefit of it being open source and its improved electricity consumption.


3 new materials to complement silicon

Silicon as a base material for microchips is increasingly reaching its limits. The demand for increasingly small and fast integrated circuits has pushed material ­efficiency to the limits of what is possible. Research into new materials is in progress – there are several future materials that are very promising. High-performance gallium nitride has been able to be used in power grids for more efficient and faster power conversion thanks to its high critical energy field. Semiconductors based on antimony and bismuth are used in improved infrared sensors for the medical and military field. Graphene has the potential to surpass silicon as an all-purpose semiconductor material – however, widespread ­commercialisation could still be up to twenty-five years away. Pyrite could be used as a substitute for the rare earth element cadmium telluride, which is in ­widespread use in solar cells, but is limited in supply. Pyrite is ­abundant, cheap and non-toxic.


4 artificial intelligence has the edge

With an expected growth of significantly over 100 per cent in the next five years, edge AI is one of the biggest trends in the chip industry. The application of learnt ­“knowledge” (the inference) is embedded in the endpoints of the ­Internet of Things in edge AI. Commercially available edge AI chips now provide efficiency in the order of 1 to 100 tera operations per second per watt (TOPS/W). Fast GPUs or ASICs are used for the calculations here. Significantly higher levels of efficiency are required in order to implement the IoT. Research is being carried out into solutions that achieve an efficiency of 10,000 TOPS/W 


5 new 3D technologies enable ­hetero­geneous integration

Heterogeneous integration, i.e. integration of various types of electronic components on a chip will be increasingly important in the future in order to overcome the memory limit or to increase the functionality in systems with a limited form factor. 3D integration technologies form the basis for this. Distances of approximately 30 micrometres can currently be realised between the junctions, the solder balls or microbumps in production. The aim is to further reduce these distances. For ­example, IMEC has already achieved junction ­distances of seven micrometres. These kinds of high-density ­junctions in the case of heterogeneous integration enable a 3D junction density between the chips that is more than 16 times greater; this means that the space ­required is significantly reduced.


6 nonvolatile memories on the rise

The speed of scaling is noticeably decreasing in the case of nonvolatile memories. Yet, processes such as ­wafer-to-wafer bonding in the case of NAND memories or EUV lithography in the case of DRAMs still offer potential for improvement in terms of patterning, but they are starting to approach their limits. In contrast, new approaches promise further improvement in ­storage capacity. This includes magnetoresistive random-­access memory (MRAM), which enables significantly ­faster memory access while still offering a lower energy ­consumption than electronic memories such as DRAMs at the same time. Additionally, MRAM memory cells on a chip only require a fraction of the space that DRAM or SRAM cells take up, for example. 


7 increasing logic performance

Transistors will continue to shrink in the future – but the increase in performance with the same power consumption has slowed down significantly. One reason for this is the required scaling of the current and voltage supplies, as electrical connections are minimised with the patterns – this increases their resistance. The buried power rails (BPR) in the substrate could be a solution for this: they are intended to enable an increase in power at the system level thanks to optimised power distribution. ­Furthermore, research is being carried out into new materials that reduce resistance: these include hybrid metallisation with ruthenium or molybdenum. In the future, interconnects on the chips could consist of binary alloys and cobalt-based materials instead of copper; these are then intended to reduce line resistance.


8 CMOS and MEMS join forces

Established CMOS technologies will increasingly be supplemented with MEMS (micro-electromechanical systems) in the future. The CMOS wafers serve as an ­“intelligent” substrate here, as they already contain control and readout circuits, signal processing and interfaces for energy transmission. Through the combination of CMOS and MEMS, inexpensive and extremely compact micro-systems for use in areas including medicine, ­industry, mobility and aerospace can be created.