Interview with Calista Redmond

Interview with Calista Redmond, CEO of the RISC-V Foundation

The success story of Linux – a free, open-source operating system for anyone to work on – began over 20 years ago. These days, Linux is the leading operating system for embedded devices. Calista Redmond now wants to repeat this success story with open-source hardware. Since March 2019, she has been CEO of the RISC-V Foundation, which is forging ahead with an open-source instruction-set architecture. This is envisaged to enable anyone to develop, manufacture and sell processors without being liable for licence fees. In an interview with the Future Markets Magazine, the business graduate and -experienced manager came across as a staunch advocate of open-source systems.

Even before starting out as an executive at the foundation, she had already overseen various open-source initiatives at IBM, among other things. While there, she learned how the roll-out of new technologies can be accelerated by collaborating with other organisations. As a co-founder of as many as four successful start-ups, she also knows how to work well together with numerous stakeholders – experience that made her ideally equipped for taking the helm of the RISC-V Foundation. Redmond is convinced of one thing:

Open-source hardware can dramatically speed up innovations and open up the playing field for the benefit of the entire eco-system.“

What do you find so exciting about the world of IT?

Calista Redmond: Technology is the single most powerful force to disrupt industries, empower companies and improve the lives we lead. Everyone has a role to play and open source in particular can level the playing field to engage and enable participation.

Before your career at IBM, you were a co-founder of four start-ups. Why make the switch to a large company – and then to a foundation?

C. R.: There is a tremendous level of learning to be realised when you are creating and building a company on your own – from every corner and facet of the enterprise. Likewise, there are honed best practices and discipline that may be gleaned from a large corporation. The grounding principle of both experiences that led me to grow my experience in open source is the impact that can best be achieved through collaboration. An open-source community allows deep collaboration to thrive with shared, longterm strategic interest. Bringing the open-source ideology into hardware is something I’ve been leaning into for many years, and RISC-V is a phenomenal architecture and community to build with.

Why does the industry need open hardware solutions?

C. R.: While open-source software has been around for decades, it has been more challenging to get the industry to collaborate on and adopt open hardware solutions. However, the challenges of hardware design – including development time and costs – are exactly why the industry needs open hardware solutions.

Is working on an open-source -project -different to working on a classic, -proprietary system? 

C. R.: Yes, it’s quite different since you need to take into consideration many additional variables. Open-source solutions have to be suitable for the needs of a variety of companies around the world, all building solutions for a wide range of applications and industries. Interoperability among implementations is much more important for open-source solutions. Additionally, open-source projects rely on community effort to accomplish objectives and goals, which becomes rewarding when you witness a community of like-minded folks huddling up to solve the industry’s most complex problems together. This means that transparency is key and decisions are made democratically instead of in a top-down fashion. At its core, we’re determining the base building blocks upon which many companies may build their businesses.

What does the exponential growth in the use of embedded systems and edge computing mean for processors in general?

C. R.: The computing demands of artificial intelligence, machine learning, IoT, high-performance computers and virtual and augmented reality have put a ton of pressure on the industry. New computing needs in various power and performance dimensions have increased the overall demand and competition for custom processors purpose-built for specific application needs. Since legacy instruction set architectures (ISAs) are decades old, they are not designed to handle the latest workloads. The RISC-V ISA allows us to start with a clean sheet of paper and optimise designs for new workloads, ushering in a new era of silicon design and processor innovation through open-standard collaboration.

How did the idea of RISC-V emerge?

C. R.: In the summer of 2010, the Computer Science team at UC Berkeley started a project to create their own design architecture. They called this architecture RISC-V, since it is the fifth major iteration of the RISC (Reduced Instruction Set Computer) ISA. This project was spearheaded by Krste Asanovic, Andrew Waterman and Yunsup Lee with support from David Patterson, who pioneered RISC architecture in the 1980s. The RISC-V Foundation was founded in 2015 to direct the future development and direction of the RISC-V ISA.

What are the benefits of RISC-V?

C. R.: The RISC-V ISA is an open-source blueprint for general and custom processors that offers all types of companies, big and small, the ability to accelerate innovation.

RISC-V offers a new level of software and hardware freedom on architecture in an open, extensible way. The open ISA delivers easier support from a broad range of operating systems, software vendors and tool developers. RISC-V does not rely on a single supplier – it offers multiple suppliers, supporting unlimited potential for future growth. And finally, no other ISA is designed like the RISC-V ISA, allowing for user extensibility of the architecture without breaking existing extensions or incurring software fragmentation. But those are only some of the key benefits of RISC-V.

What fascinates you personally about RISC-V?

C. R.: Throughout my career, I’ve been proud to be part of a number of open-source initiatives to drive tech innovation and foster industry-wide collaboration. The RISC-V ecosystem is one of the most dynamic communities I’ve seen to date. During the past year, the RISC-V Foundation has seen membership growth of more than 100 per cent, surpassing 420 organisations, individuals and universities from 28 countries and six continents. As the ISA has moved beyond its origins in academia, we are witnessing more and more commercial adoption and implementations across a variety of industries. Most importantly, I truly believe open-source collaboration like RISC-V is driving the future of technology. I’m proud to be helping lead the RISC-V revolution.

What is there to be gained by manufacturers of IoT devices, for example?

C. R.: The RISC-V ISA offers significantly more control over hardware and software implementations. With RISC-V, designs can be optimised for a variety of features like lower power, higher performance and stronger security while maintaining full compatibility with other RISC-V-based designs. RISC-V is making it easier for IoT manufacturers to enable the next generation of IoT devices to process AI information from rich data sources such as image, video and audio, and to develop products with security built in from the start.

How have established chip manufacturers reacted to it?

C. R.: We have reached a critical mass of companies adopting RISC-V and contributing to the ecosystem, including several chip manufacturers. I anticipate we’ll see even more interest from chip manufacturers in the coming years as these companies look to RISC-V to expand their offerings to meet their customers’ needs.

Why is RISC-V so exciting for embedded and edge systems in particular?

C. R.: Companies are reaping the many benefits from the free and open RISC-V ISA. RISC-V unlocks architecture and enables innovation, ushering in new possibilities and applications. With its robust ecosystem, RISC-V accelerates the time-to-market, in addition to reducing risk and investment so that companies can design innovative solutions without a large team or budget. Additionally, RISC-V creates opportunities to create thousands of potential custom processors with its layered and extensible ISA. Companies can implement the minimal instruction set, well-defined extensions and custom extensions to create processors custom-built for the next generation of edge computing devices.

Who is already using RISC-V today? In which applications?

C. R.: The RISC-V Foundation has an incredibly dynamic community with 420 members in different industries: application processors and graphics, commercial chips, consulting and research, development tools, foundry services, FPGA, IP and design services, machine learning and AI, networking, semiconductor IP, as well as software and the cloud. On our website, you can find a list of various cores and SoCs that endeavor to implement the RISC-V specification.

One of your tasks at the RISC-V Foundation is to drive forward the roll-out of RISC-V eco-systems around the world. How far along is this process today?

C. R.: RISC-V has seen strong global adoption, including government-led RISC-V initiatives in China, the European Union and India. In addition to the Foundation-led task groups and activities, there are numerous RISC-V groups and events around the world. Over the next few years we’ll start to see more consumer devices built with RISC-V-based solutions, in addition to HPC systems, servers and other computing machines.

RISC-V – Openness for chip designs

Practically every conceivable type of electronic design can benefit from the RISC-V open instruction-set architecture. It is the basis for fast, small, powerful and energy-efficient processors, which can be used for many applications. Implementation is possible in this context for FPGAs, ASICs or customer-specific CPUs. RISC-V is available under a BSD licence, which allows anyone to develop, manufacture and distribute processors based on this architecture without having to pay licence charges.

The Reduced Instruction Set Computer V (RISC-V) is an open instruction-set architecture (ISA). One special feature of RISC-V is that the current instruction-set architecture is already established, which ensures that programs developed today will run on future RISC-V processor cores. Embedded designs with a very long lifetime will benefit here especially.

In addition, the RISC-V architecture is modular and extensible, which means that processors can be developed that offer a range of features tailored precisely to the respective application. Fewer than 50 base instructions are needed and even if all base instructions and optional enhancements are used, the RISC-V core executes fewer than 200 instructions. In comparison, other popular RISC-V architectures include more than 1,000 instructions. Owing to the smaller number of instructions, RISC-V processors are more compact in design than other architectures, which in turn results  in lower power consumption. Thanks to the openness, RISC-V also allows the interfaces, buses and peripherals that are most suitable for an application to be selected.


Read more about the RISC-V Foundation here:


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